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139采集卡

139采集卡

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  • 发布日期:2021-05-19 10:08:03
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FWB-PCI3202A

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Host   Bus:· 33-MHz/32-Bit PCI Interface· 3.3-V and 5-V PCI Signaling   EnvironmentsIEEE 1394 Std Support:· Fully Supports Provisions of IEEE   P1394b Revision 1.33+ at 1-Gigabit Signaling Rates· Fully Supports   Provisions of IEEE 1394a.2000 and 1394.1995 Standard for High Performance   Serial Bus· Fully Interoperable With Firewire., i.LINK., and SB1394., Implementation   of IEEE Std 13941394 Bus Transfer Rate:Provides three fully   backward-compatible, (IEEE Std 1394a-2000 fully compliant) Bilingual IEEE Std   1394b-2002 cable ports at S100/S200/S400/S400B/S800 megabits per second   (Mbits/s).IEEE-1394 to PCI Controller· Texas Instruments   TSB83AA23· PCI burst transfers and deep FIFOs to tolerate large host   latency· Transmit FIFO—5K asynchronous· Transmit FIFO—2K   isochronous· Receive FIFO—2K asynchronous· Receive FIFO—2K   isochronousDV and DA Enhancement:· Digital Video and Audio performance   enhancements.· Extended resume signaling for compatibility with legacy   DV components.Power Management :D0, D1, D2, and D3 power states and PME   events per the PCI Bus Power Management Interface SpecificationNumber of   ports:· FWB-PCI3202B: Three External Bilingual Ports (with screw   lock)Bus Power Connector:Big IDE 4-pin DC Power Connector

IntroductionFWB-PCI3203   is a three port OHCI 1.1 Compliant FireWire 800 (IEEE-1394b) to PCI Host   Adapter featuring Texas Instruments OHCI 1.1 Compliant FireWire 800   (IEEE-1394b) Single Chip Host Controller.

Technical   SpecificationsHost Bus:· 33-MHz/32-Bit PCI Interface· 3.3-V and 5-V   PCI Signaling EnvironmentsIEEE 1394 Std Support:· Fully Supports   Provisions of IEEE P1394b Revision 1.33+ at 1-Gigabit Signaling   Rates· Fully Supports Provisions of IEEE 1394a.2000 and 1394.1995   Standard for High Performance Serial Bus· Fully Interoperable With   Firewire., i.LINK., and SB1394., Implementation of IEEE Std 13941394 Bus Transfer   Rate:Provides three fully backward-compatible, (IEEE Std 1394a-2000 fully   compliant) Bilingual IEEE Std 1394b-2002 cable ports at   S100/S200/S400/S400B/S800 megabits per second (Mbits/s).IEEE-1394 to PCI   Controller· Texas Instruments TSB83AA23· PCI burst transfers and   deep FIFOs to tolerate large host latency· Transmit FIFO—5K   asynchronous· Transmit FIFO—2K isochronous· Receive FIFO—2K   asynchronous· Receive FIFO—2K isochronousDV and DA   Enhancement:· Digital Video and Audio performance   enhancements.· Extended resume signaling for compatibility with legacy   DV components.Power Management :D0, D1, D2, and D3 power states and PME   events per the PCI Bus Power Management Interface SpecificationNumber of   ports:· FWB-PCI3203: Two External Bilingual Ports (with screw lock) +   One Internal Bilingual PortBus Power Connector:Big IDE 4-pin DC Power   Connector IntroductionFWB-PCI3204 is a three port OHCI 1.1 Compliant   FireWire 800 (IEEE-1394b) to PCI Host Adapter featuring Texas Instruments   OHCI 1.1 Compliant FireWire 800 (IEEE-1394b) Single Chip Host   Controller. Technical SpecificationsHost Bus:· 33-MHz/32-Bit PCI   Interface· 3.3-V and 5-V PCI Signaling EnvironmentsIEEE 1394 Std   Support:· Fully Supports Provisions of IEEE P1394b Revision 1.33+ at   1-Gigabit Signaling Rates· Fully Supports Provisions of IEEE 1394a.2000   and 1394.1995 Standard for High Performance Serial Bus· Fully   Interoperable With Firewire., i.LINK., and SB1394., Implementation of IEEE   Std 13941394 Bus Transfer Rate:Provides three fully backward-compatible, (IEEE   Std 1394a-2000 fully compliant) Bilingual IEEE Std 1394b-2002 cable ports at   S100/S200/S400/S400B/S800 megabits per second (Mbits/s).IEEE-1394 to PCI   Controller· Texas Instruments TSB83AA23· PCI burst transfers and   deep FIFOs to tolerate large host latency· Transmit FIFO—5K   asynchronous· Transmit FIFO—2K isochronous· Receive FIFO—2K   asynchronous· Receive FIFO—2K isochronousDV and DA   Enhancement:· Digital Video and Audio performance   enhancements.· Extended resume signaling for compatibility with legacy   DV components.Power Management :D0, D1, D2, and D3 power states and PME   events per the PCI Bus Power Management Interface SpecificationNumber of   ports:· FWB-PCI3204: One External Bilingual Port (with screw lock) + Two   Internal Bilingual PortsBus Power Connector:Big IDE 4-pin DC Power   Connector


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